The Pin N33 Mystery and the History of Slockets

The Ultimate Museum PC (UMPC) is a dual Slot 1 based system. Fast Slot 1 based Pentium III processors turned out to be extremely difficult to find (especially at non-ridiculous prices like $200 per CPU). The current 850MHz processors are good, but not ultimate.

Luckily there are slockets (or slotkets) which convert a Socket 370 processor into a Slot 1 one. For historical reasons, Intel’s Pentium III lineup was a bit schizophrenic. To understand the reasons, one must go back to the Pentium Pro (1995) which packed the processor core and between 256KB and 1MB of L2 cache onto a single “dual cavity” PGA or PPGA package. This approach proved less than ideal as the processors were very difficult to manufacture.

For the Pentium II (1997) Intel designed a completely new processor package called Slot 1. The slot processors contained a circuit board on which the processor core and L2 cache were mounted as separate chips. This approach solved the manufacturing problems, but at the cost of slowing the L2 cache to half of the clock speed of the processor core. Unlike the Pentium Pro, the Pentium II proved quite popular as it outperformed the Pentium and Pentium MMX by a healthy margin (the Pentium Pro didn’t for 16-bit code). Numerous motherboards were designed for one or two Slot 1 Pentium II processors.

For the cost-conscious, Intel introduced the Celeron line of processors. The first generation (Covington, April 1998) was essentially a Pentium II with no L2 cache whatsoever. These processors were poor performers and not very popular. Shortly thereafter the Mendocino Celeron (August 1998) processors came. These processors were also built around the Pentium II core but had 128KB of L2 cache as opposed to 256KB of the “real” Deschutes Pentium II. The catch was that the Mendocino’s cache ran at full clock speed while the Deschutes’ was half-speed. In some situations, the Celerons with smaller but faster L2 cache outperformed their supposedly higher-end brethren.

To make matters more interesting, Intel manufactured the Mendocino Celerons in  Slot 1 packaging but also introduced new PPGA Celerons in Socket 370 form factor. At this point, manufacturing the CPU core and the L2 cache on a single die was no longer a problem (note that the Mendocino Celerons also only used 128KB L2 cache as opposed to at least 256KB of the old Pentium Pro).

This caused minor confusion among users and motherboard manufacturers. There were a few Socket 370 boards (including the famous ABIT BP6) but most vendors stuck with the Slot 1 form factor. To bridge the gap, “slockets” (or “slotkets”) were introduced: Socket 370 to Slot 1 converters. Since the Slot 1 and Socket 370 processors had essentially identical electrical interface, it was possible to build slockets that could be sold for about $20.

When the first Pentium III (Katmai, 1999) processors were introduced, Intel seemed to continue sending a clear message: Slot 1 is for high-end processors, Socket 370 is for the cheap ones. Katmai Pentium III processors were only available in Slot 1 packaging. But then the Coppermine Pentium III CPUs came (2000) and threw everything upside down. Next to the Slot 1 Coppermine processors, Intel started manufacturing Socket 370 FCPGA Pentium IIIs which only differed in packaging. It is likely that laptops provided an impetus for better support of Socket 370. For obvious reasons, Slot 1 processors were useless for laptops, but Socket 370 CPUs were quite small and laptops could (and did) use them.

With Slot 1 processors, Intel stopped at 1GHz (with both 100MHz and 133MHz FSB). On the other hand, Socket 370 Coppermine Pentium IIIs were also available in 1.1GHz (and the infamous aborted 1.13GHz). Once the Tualatin die shrink was released (2001), the Slot 1 packages were completely gone and only Socket 370 Pentium III processors remained. At that point, Intel was able to manufacture processors with up to 512KB full-speed L2 cache on-die: the Pentium III-S, everyone’s favorite Tualatin processor.

This increased the need for slockets; motherboards continued being manufactured predominantly with slots, since that way users could install both Slot 1 and (with a slocket) Socket 370 processors. Only the latter-day boards designed for Tualatin CPUs (roughly 2001-2003) came strictly in Socket 370 format.

MSI Master Slockets

The OS/2 Museum obtained several MSI Master slockets (version 2.0) for use with the UMPC. Almost immediately, a serious problem became apparent: While these slockets can support any Coppermine processor, they only support one. Ironically, the slockets support Mendocino Celerons in SMP configurations, but not Pentium III processors.

If it weren’t for that, the MSI Master slockets would be perfect for the UMPC. They support 66/100/133MHz FSB and voltages at least down to 1.5V; the default settings provide automatic frequency and voltage selection, which means that in the typical case one only needs to socket the CPU, install a heatsink/fan, and plug the slocket into the motherboard. As long as “typical case” means “one processor only”.

Note that for Coppermine CPUs, these slockets require a Coppermine-enabled motherboard (such as the P2B-DS rev. 1.06). The MSI Master slockets (just like most other slockets) do not include a voltage regulator; they simply request the correct voltage from the motherboard’s VRM.

There was one well known slocket which supported dual processors: the ASUS S370-DL. Unfortunately this slocket is impossible to find (especially if one needs a pair of them). There were rumors about a modification of other slockets which involved pin N33 on the CPU/socket. Pin N33 is marked as “reserved for future use” by Intel in Pentium III documentation.

It is clear that pin N33 is significant in Coppermine SMP systems and various slocket models may need connecting the N33 pin in order to support dual processor operation. It is less clear what the pin does exactly or why it’s not documented. It’s apparent that the pin is significant during system reset when the bus agent IDs are determined; in other words, one CPU is designated as “primary” or the BSP, the other as “secondary” or the AP.

Fixing the MSI Master slocket isn’t particularly complicated:

The modification is in fact quite easy… if one has the right kind of wire and a suitable soldering iron. The pins are connected on the reverse side of the PCB which is normally hidden under a plastic cover. The patch wire is then nicely protected and can’t be accidentally ripped off.

The modification does indeed work and was verified with two 700MHz Coppermine processors. The next step is finding faster processors; the question is which ones. Supporting Tualatins requires further modifications which are somewhat destructive. Then there’s the hairy FSB frequency problem.

440BX at 133MHz FSB

The 440BX chipset only supports 66/100MHz FSB speeds. It can be overclocked to 133MHz without much trouble (in fact it is said to handle 150MHz FSB speeds quite well), but at least in the P2B-DS boards, there are several problems:

The P2B-DS rev. 1.06 can be jumpered to 133MHz FSB easily enough, but then the PCI bus will be run at 44MHz, significantly out of spec (33MHz). That can be fixed with a hardware modification which isn’t entirely trivial.

Worse yet, the AGP bus will remain out of spec at 89MHz (vs. 66MHz). Many graphics cards tolerate this, but most notably the ones using ATI R300/R360 GPUs do not (the graphics card will not POST at all).

Perhaps the nastiest problem is that at 133MHz, the P2B-DS boards do not reliably work with four DIMMs. The maximum memory is reduced from 1GB to 768MB or possibly only 512MB. There is no known solution for this problem. Note that many 440BX-based boards only sported three DIMM slots which would have likely avoided this problem.

At the same time, using 133MHz FSB does not appear to have a big performance impact, or at least not always. With many SDRAM chips, the system will use 2-2-2-X memory timings at 100MHz FSB but 3-3-3-X at 133MHz. That almost completely eliminates the speed advantage from the faster FSB.

Given all these restrictions, sticking with 100MHz FSB speeds certainly generates far fewer problems; but the question has not been settled yet.